The invention relates to a coding apparatus of a television signal (hereinafter, referred to as a TV signal) or the like and, more particularly, the invention intends to miniaturize a high efficiency coding apparatus for transmitting a TV signal by using a low speed line.
It is known that a transmission speed of about 100 Mb/sec is needed to transmit a TV signal by a digital signal without compressing the signal. A high efficiency coding system has been proposed to reduce the transmission speed and the transmission costs. The high efficiency coding denotes processes such that a TV signal to be presently encoded is predicted by using a transmitted preceding picture plane (reference frame), a transmitted signal on a scanning line just over the present scanning line, or the like and a difference (prediction error) between the prediction value and the true signal is obtained and the difference is encoded and transmitted. A system to predict the TV signal from the reference frame is called an inter-frame prediction system. A system to predict the TV signal from only the frame to be coded such as a scanning line just over the present scanning line or the like is called an intra-frame prediction system. In any of the above coding systems, when the transmission speed is slow, in many cases, a frame dropping process to thin out the frames to be transmitted is executed. Since the details of the above coding systems are not directly concerned with the present invention and have been described in detail in "Multi-dimensional TV Signal Processing of TV Image", by Takahiko Fukinuki, The Nikkan Kogyo Shimbun Ltd., Pages 270-271 and 225-226, its detailed description is omitted here.
FIG. 1 is a whole constructional diagram of a TV signal coding apparatus. An input TV signal 1 is supplied to an NTSC decoder and A/D converter 2, by which a luminance signal and a chrominance signal are extracted from an NTSC signal as an ordinary TV signal and converted into digital signals. The digital signals are stored into a frame memory 4. The processing order of the NTSC decoding and the A/D conversion can also be reversed. The digital image signal stored in the frame memory 4 is read out every pixel by a coder 6, is subjected to compressing and coding processes and is generated as a code word 7. The code word 7 is converted by a communication interface 8 into a signal format which is specified by a transmission path and is supplied onto a transmission line 9 for transmitted.
In many cases, the frame memory 4 includes a buffer memory using two memories in order to reduce a writing waiting time for the frame memory. The operations in the above case are as shown in FIGS. 2A and 2B. That is:
(A) One memory 21 of the two frame memories is used to write the input TV signal. Another memory 22 is used to read out a T signal for coding.
(B) When the coding process of one frame is finished, the roles of the two frame memories are exchanged by a frame change request signal 10. The memory 21 used to write the TV signal is used to code the TV signal. The memory 22 used for reading out and coding the TV signal is used to write the TV signal.
To execute the above processes, a read address generating circuit 31 and a write address generating circuit 32 are provided, and a read address 35 generated from the read address generating circuit 31 and a write address 36 generated from the write address generating circuit 32 are switched to the memory side set by switches 33 and 34, respectively. Synchronously with them, the input and output data are switched by switches 20 and 23 on the basis of a change signal 30.
A mode change controller 26 switches the memories as described in the control example 1 shown in FIG. 2B or in the control example 2 shown in FIG. 2C.
In the reading or writing operation of an image from/into the frame memory 4, the following conditions are generally satisfied when considering a frame unit.
(A) The writing operation of an image write signal 3 can only be started approximately every about 33 msec in synchronism with the frame of the TV signal.
(B) An image read signal 5 is read out at a timing according to the process of the coder 6 asynchronously with the writing timing.
In the reading operations of the image write signal 3 and the image read signal 5, the following conditions are generally satisfied when considering a pixel unit.
(1) The writing operation of pixels is sequentially periodically executed in accordance with the order of the scanning lines of the TV signal preferentially in the horizontal direction from the left upper position of the screen to the right lower position.
(2) The reading operation of pixels is executed from the left upper position of the screen to the right lower position as a whole. However, there is a case where the pixels are read out in accordance with the order irrespective of the writing order within a predetermined range when considering a local area.
(3) A reading period of the pixels is equal to or longer than a writing period of the pixels. That is, a writing time of one frame is certainly equal to or shorter than a reading time.
(4) The maximum value of the time which is required from a time point at which one pixel has been read out to a time point at which the next pixel is read out cannot be specified.
Among the above conditions, the point of the item (1) such that the signal writing operation is started only from a special time becomes a particular problem. There is a case where a waiting time shown as L.sub.w in FIG. 2B occurs for a period of time until the frame transferred from a TV camera is actually coded. A time to actually execute a coding process is reduced due to such a waiting time. Consequently, there occurs a problem such that the actual processing ability deteriorates as compared with the maximum ability or an apparatus scale increases by preliminarily making a processing design in consideration of such a waiting time on the contrary.
No waiting time occurs by fetching only the frame just after the start of the coding process as shown in FIG. 2C. In such a case, however, a delay time shown by L.sub.d in the diagram occurs. It is well known that a mental burden increases when a delay time which occurs until the TV signal obtained by photographing an object image by the TV camera is displayed to a person who receives the TV signal is long.
Means for effectively eliminating those problems has been disclosed in JP-A-2-203689. As shown in an example of FIG. 3, it is a feature of the invention that, in the double buffer memory system, there are provided memories 61 and 62 (simultaneous reading and writing type memories) whose reading and writing operations can be simultaneously or instantaneously switched and the mode change-over switches 20, 34, 23, and 33 which can independently switch the reading and writing operations. The image write signal 3 obtained by repetitively photographing the object image by the TV camera is written into the memory 62 for writing. After completion of the coding process of one frame due to the signal reading operation from the memory 61, the read switches 23 and 33 are switched by a read change signal 40 irrespective of the writing state into the memory 62, thereby setting the memory 62 into a mode to read out the coding signal. In this instance, even after the read switches 23 and 33 were switched, the TV signal 3 photographed by the TV camera is continuously written until the writing operation of the frame is finished. After completion of the writing operation of the frame, the write switches 20 and 34 are switched by a write change signal 41. The reading operation is executed just after the read switches 23 and 33 were switched. The coding operation is temporarily stopped only in the case where the read address 35 catches up to the write address 36. The above control is performed by a comparator 46 and a control signal 47, thereby preventing that the above addresses coincide.